Photo for Mohammad Alian

Mohammad Alian

Assistant Professor
Department of Electrical Engineering and Computer Science
University of Kansas

offices : 2022 Eaton Hall, 253 Nichols Hall
email : alian@ku.edu
links : Research Group | Google Scholar | LinkedIn | github | Curriculum Vitae

Biography

Mohammad Alian serves as an Assistant Professor in the EECS Department at the University of Kansas. He completed his Ph.D. and MS degrees from UIUC (2020) and UW-Madison (2015), respectively. His research team is focused on redefining the data-delivery hierarchy of future data centers. Mohammad's research has garnered recognition, including best paper nominations at HPCA 2017 and MICRO 2018, an IEEE Micro Top Picks Honorable Mention in 2017, an NSF CAREER award, and a University of Kansas Miller Scholar Award. He serves as a co-Principal Investigator and Broadening Participation Champion for the SRC/DARPA JUMP 2.0 ACE Center for Evolvable Computing, with the primary objective of revolutionizing distributed computing for the next decade.

News

  • 02/28/2024 Presented our work on accelerating Retrieval Augmented Generation (RAG) to Micron!
  • 11/07/2023 DSCS-Serverless got accepted to ASPLOS 2024!
  • 10/22/2023 SmartDIMM and DMX papers got accepted to HPCA 2024! Congrats to Neel and Amin!
  • 09/16/2023 XFM received all the artifact evaluation ACM badges from MICRO 2023!
  • 09/15/2023 Our project to enhance gem5 simulator ecosystem is selected for funding by NSF! This is a $3.5M collaborative project led by Jason Lowe-Power at UC-Davis!
  • 07/24/2023 XFM accepted to MICRO 2023!
  • 07/20/2023 Serving on HPCA 2024 PC!
  • 07/10/2023 Our AI-Assisted Just-in-Time Scaffolding Framework for Exploring Modern Computer Design is selected for funding by NSF!
  • 07/01/2023 Serving as the Broadening Participation Champion for ACE center!
  • 06/26/2023 Giving a talk on inteligent data steering for Tbps networks in MPSoC Forum!
  • 06/17/2023 Giving a talk on sustainability of architectural simulation in the gem5 workshop in conjunction w/ ISCA!
  • More
  • 05/12/2023 Received the Miller Faculty Scholar Award from KU School of Engineering!
  • 04/12/2022 Serving on MICRO 2023 PC!
  • 03/29/2023 Received $5k cloud access credit under the NSF CloudBank award for our research!
  • 03/22/2023 Received an NSF CAREER award for research on near-memory datacenter network!
  • 02/28/2023 gem5 profiling accepted to ISPASS 2023!
  • 02/24/2023 Neel and Johnson presenting their research in YArch and FireSim workshops hold in conjunction w/ ASPLOS!
  • 02/12/2023 I am visiting EPFL PARSA Lab for one semester!
  • 01/27/2023 Check out our latest addition to gem5! DPDK on gem5 is open source!
  • 01/05/2023 Official announcement of the ACE Center for Evolvable Computing, funded by a $31.5 million grant from JUMP 2.0!
  • 09/21/2022 Serving as travel grant chair on ISPASS 2023!
  • 09/07/2022 Serving on ISCA 2023 ERC!
  • 09/01/2022 Johnson is presenting a poster at ACM Student Research Competition in MICRO!
  • 08/30/2022 Our team got second place in Open Innovation Contest for AXDIMM Technology
  • 07/19/2022 IDIO got accepted to MICRO 2022!
  • 07/15/2022 Presenting our recent research at Intel Labs!
  • 07/08/2022 "CCRI: Planning-C: Accelerated Infrastructure for Simulating Future Systems" is selected for funding by NSF!
  • 06/03/2022 Neel Patel received SFS scholarship. Congrats Neel!
  • 03/10/2022 Two BlueField2 DPUs donated by NVIDIA!
  • 12/15/2021 Our proposal is selected as one of the finalist in Open Innovation Contest for AXDIMM Technology!
  • 08/01/2021 Samsung Grant!

Research

Areas of interest: Computer Architecture and Systems

Vision: My research sees compute as a revolving paradigm around data delivery hierarchy (i.e., memory, storage, and network) and not the other way around, which is the conventional view. From this perspective, my vision is to depart from the conventional separation of the tasks between data delivery hierarchy and compute to build next-generation datacenter. I have initiated three cross-stack research vectors that rethink data-delivery hierarchies and their conventional divisions with compute appliances for different domains of applications. The first vector addresses the memory wall issue, seeking to break the rigid delineation between compute and memory through innovations in network-enabled near-data computing. The second vector goes beyond hardware specialization for compute and delves into data motion acceleration. The last vector focuses on tools and methodologies for understanding cross-domain application execution on scale-out systems, crucial for grounding the out-of-the-box research in realizing my vision for next-generation datacenters.

Check out KU Architecture Research Group webpage to understand more about our research.

I have several open Ph.D. positions and one postdoc position. Please contact me if you are interested in working on the following projects!

Research Vector (1): Network-Enabled Near-Memory Acceleration at Scale

The strict separation of responsibilities between compute and memory has given rise to the memory wall, constraining compute units to access data solely over a narrow channel. My research aims to remove this barrier for cross-domain scale-out applications by realizing a network-enabled near-memory acceleration paradigm. The added networking and OS support uniquely separate my research from existing works in near-data processing.

Related Publications: MICRO'18, MICRO'19 MICRO'23 HPCA'24

mcn Memory Channel Network (MCN), MICRO'18

Research Vector (2): Data Motion Acceleration for Cross-Domain Applications

As Research Vector (1) significantly diminishes the effects of the memory wall, the performance and energy efficiency bottleneck begins to shift to data motion across the scale-out interconnect. Data motion involves data restructuring and data movement which our work targets both for acceleration.

Related Publications: MICRO'18 ISPASS'20, CAL'20, ISCA'21, MICRO'22 HPCA'24

ddio

Data Motion Acceleration, HPCA'24

Research Vector (3): Architectural Simulation at Scale

Software-based simulation is the backbone of computer architecture research and development. Architectural simulators such as gem5 are widely used by academia and industry for modeling different aspects of future computing platforms. However, traditionally, the focus of architectural simulators was on just simulating CPU and memory sub-systems, ignoring the I/O subsystem and the complex interplay between software/OS/hardware and network. Identifying the need for a fast, accurate, and detailed full-system simulation of future large-scale systems, we strive to extend state-of-the-art architectural simulators to model modern network technologies and run the latest software stack. Another important challenge in architectural simulation is the steep learning curve of such simulators. Our latest supports from NSF (CCRI, EAGER, CSSI) target these challenges.

Related Publications: ISPASS'17, IISWC'18, ISPASS'20, arXiv'20 ISPASS'23 arXiv'23

dist-gem5 dist-gem5, ISPASS'17

Selected Publications

  • Rohan Mahapatra, Soroush Ghodrati, Byung Hoon Ahn, Sean Kinzer, Shu-Ting Wang, Hanyang Xu, Lavanya Karthikeyan, Hardik Sharma, Amir Yazdanbakhsh, Mohammad Alian, and Hadi Esmaeilzadeh, "Domain-Specific Computational Storage for Serverless Computing," ASPLOS 2024 [paper][slides]
  • Neel Patel, Amin Mamandipoor, Mohammad Nouri, and Mohammad Alian, "SmartDIMM: In-Memory Acceleration of Upper Layer I/O Protocols," HPCA 2024 [paper][slides]
  • Shu-Ting Wang, Hanyang Xu, Amin Mamandipoor, Rohan Mahapatra, Byung Hoon Ahn, Soroush Ghodrati, Krishnan Kailas, Mohammad Alian, Hadi Esmaeilzadeh, "Data Motion Acceleration: Chaining Cross-Domain Multi Accelerators," HPCA 2024 [paper][slides]
  • Neel Patel, Amin Mamandipoor, Derrick Quinn, and Mohammad Alian, "XFM: Accelerated Software-Defined Far Memory," MICRO 2023 [artifacts available, functional, and reproduced][paper][slides]
  • Johnson Umeike, Neel Patel, Alex Manley, Amin Mamandipoor, Heechul Yun, Mohammad Alian, "Profiling gem5 Simulator," ISPASS 2023 [paper][slides]
  • Siddharth Agarwal, Minwoo Lee, Ren Wang, Mohammad Alian, "Enabling Kernel Bypass Networking on gem5," Arxiv 2023 [paper][ open source]
  • Mohammad Alian, Siddharth Agarwal, Jongmin Shin, Neel Patel, Yifan Yuan, Daehoon Kim, Ren Wang, Nam Sung Kim, "IDIO: Network-driven, inbound network data orchestration on server processors," MICRO 2022 [paper][slides]
  • Ki-Dong Kang, Gyeongseo Park, Hyosang Kim, Mohammad Alian, Nam Sung Kim, and Daehoon Kim, "NMAP: Power Management Based on Network Packet Processing Mode Transition for Latency-Critical Workloads," MICRO 2021 [paper]
  • Yifan Yuan, Mohammad Alian, Yipeng Wang, Ilia Kurakin, Ren Wang, Charlie Tai, Nam Sung Kim, "Don't Forget the I/O When Allocating Your LLC," ISCA 2021 [technology adapted by Intel®] [paper][slides]
  • Mohammad Alian, Jongmin Shin, Ki-Dong Kang, Ren Wang, Alexandros Daglis, Daehoon Kim, Nam Sung Kim, "IDIO: Orchestrating Inbound Network Data on Server Processors," IEEE Computer Architecture Letters (CAL) 2020 [paper]
  • Soroush Ghodrati, Byung Hoon Ahn, Joon Kyung Kim, Sean Kinzer, Brahmendra Yatham, Navateja Alla, Hardik Sharma, Mohammad Alian, Eiman Ebrahimi, Nam Sung Kim, Cliff Young, Hadi Esmaeilzadeh, "Planaria: Dynamic architecture fission for spatial multi-tenant acceleration of deep neural networks," MICRO 2020 [paper][slides]
  • Jason Lowe-Power, Abdul Mutaal Ahmad, Ayaz Akram, Mohammad Alian, et al. "The gem5 simulator: Version 20.0+," arXiv preprint 2020 [paper]
  • Mohammad Alian, Yifan Yuan, Jie Zhang, Ren Wang, Myoungsoo Jung, and Nam Sung Kim, "Data direct I/O characterization for future I/O system exploration," ISPASS 2020 [paper][slides]
  • Mohammad Alian, and Nam Sung Kim, "NetDIMM: Low-latency, near-memory network interface architecture," MICRO 2019 [paper][slides]
  • Mohammad Alian, Seung Won Min, Hadi Asgharimoghaddam, Ashutosh Dhar, Dong Kai Wang, Thomas Roewer, Adam McPadden, Oliver OHalloran, Deming Chen, Jinjun Xiong, Daehoon Kim, Wen-mei Hwu, and Nam Sung Kim, "Application-transparent near-memory processing architecture with memory vhannel network," MICRO 2018 [best paper nominee][industry product] [paper][slides]
  • Youjie Li, Jongsea Park, Mohammad Alian, Yifan Yuan, Qu Zheng, Petian Pan, Ren Wang, Alexander Gerhard Schwing, Hadi Esmaeilzadeh, and Nam Sung Kim, "A network-centric hardware/argorithm co-design to accelerate distributed training of deep neural networks," MICRO 2018 [hardware prototype demonstration] [paper][slides]
  • Mohammad Alian, Krishna Parasuram Srinivasan, and Nam Sung Kim, "Simulating PCI-Express interconnect for future system exploration," IISWC 2018 [best paper nominee] [paper][slides]
  • Mohammad Alian, Gabor Dozsa, Umur Darbaz, Stephan Diestelhorst, Daehoon Kim, and Nam Sung Kim, "dist-gem5: Distributed simulation of computer clusters," ISPASS 2017 [best paper nominee][open source] [paper][slides]
  • Mohammad Alian, Ahmed Abulila, Lokesh Jindal, Daehoon Kim, and Nam Sung Kim, "NCAP: Network-driven, packet context-aware power management for client-server architecture," HPCA 2017 [best paper nominee][IEEE Micro honerable mention] [paper][slides]

Current Students

Teaching

Research Sponsors

  • National Science Foundation
  • Semiconductor Research Corporation
  • Samsung Electronics
  • NVIDIA (Equipment Donation)
  • Ampere Computing (Equipment Donation)